ESPARGOS/esp-sdr

选用指南

AI 根据 README 整理 · 2026/10/17 13:41:18

使用方式

通过串口（USB 或 UART）发送 ASCII 命令控制，支持浏览器固件安装器和在线 SDR 查看器。

查看 README 依据

# ESP-SDR firmware <img src="docs/espargos-logo.png" width="40%" align="right" alt="ESPARGOS logo"> ### Try it yourself: [Project overview](https://espargos.net/espsdr/) · [Browser SDR viewer](https://espargos.net/espsdr/app/) · [Browser firmware installer](https://espargos.net/espsdr/app/flash.html) ESP-SDR turns the ESP32's built-in 2.4 GHz Wi-Fi radio into a **software-defined radio (SDR)**. It lets you capture the radio signal itself and process it in software, so you can view the spectrum and study signals beyond ordinary Wi-Fi packets. No separate SDR hardware is needed. The

low (0), or high (1). See [GPIO controls](docs/rx-controls.md#gpio-outputs). ## Commands and transport Connect over native USB or a 3.3 V USB-to-UART adapter with crossed TX/RX and common ground, using the pins above. Both interfaces carry the same request/response protocol: send newline-terminated ASCII commands and read text replies. Capture replies also include a binary I/Q payload. Query `INFO` and `CAPS` to identify the firmware and supported features. `VERSION?` reports the Git revision and UTC build date/time; see [firmware version reporting](docs/firmware-version.md).

部署要求

需要 ESP32 系列芯片（如 ESP32、C2、C3、C5、C6、C61、H2、S2、S3、S31），最低 2 MB 闪存（S2 需 4 MB），部分模式需要原生 USB 或特定开发板。

查看 README 依据

| Chip | Status | Native USB | UART0 TX / RX | Minimum flash | Special modes / firmware | | --- | --- | --- | --- | --- | --- | | ESP32 | ✅ | — | GPIO1 / GPIO3 | 2 MB | — | | ESP32-C2 | ✅ (26 MHz crystal) | — | GPIO20 / GPIO19 | 2 MB | — | | ESP32-C3 | ✅ | Serial/JTAG | GPIO21 / GPIO20 | 2 MB | — | | ESP32-C5 | ✅ | Serial/JTAG | GPIO11 / GPIO12 | 2 MB | — | | ESP32-C6 | ✅ | Serial/JTAG | GPIO16 / GPIO17 | 2 MB | — | | ESP32-C61 | ✅ | Serial/JTAG | GPIO11 / GPIO10 | 2 MB | — | | ESP32-H2 | ✅ | Serial/JTAG | GPIO24 / GPIO23 | 2 MB | — | | ESP32-H21 | 🚧 | — | — | — | — |

| ESP32-H4 | 🚧 | — | — | — | — | | ESP32-P4 | ❌ | — | — | — | — | | ESP32-S2 | ✅ | USB-OTG CDC | GPIO43 / GPIO44 | 4 MB | — | | ESP32-S3 | ✅ | Serial/JTAG | GPIO43 / GPIO44 | 2 MB | [Continuous decimated I/Q over USB (15.625–250 kSa/s)](#s3-streaming) | | ESP32-S31 | ✅ | Serial/JTAG | GPIO58 / GPIO59 | 2 MB | [High Speed USB / Ethernet streaming at up to 40 MSa/s (experimental)](#s31-streaming) | ✅ Supported · 🚧 Not yet supported · ❌ Unsupported (no integrated radio). USB, UART, and flash requirements above refer to the standard firmware; see each

已知限制

固件目前仅实现接收功能，不支持发射；捕获存在间隙，采样率可能超过串口吞吐量；增益和功率未校准；扩展调谐范围不保证 PLL 锁定或接收。

查看 README 依据

 The diagram shows the hardware's receive and transmit paths; this firmware currently implements reception only. **Parts of the firmware code are AI-generated.** While we have a very good understanding of how the IQ sampling functionality works on the ESP32-C61 chip (used in our ESPARGOS One array), making IQ sampling work on the whole range of ESP32 family chips would have been too much work without LLM support. ## Chip support

- **S2:** 80/40/16 MS/s; 15–60 MHz bandwidth; up to 12,284 complex samples. - **S3:** 13–69 MHz bandwidth. - **S31:** 80/40/20/10/8/4 MS/s; 13–54 MHz bandwidth. Captures have gaps; nominal sample rates exceed sustained serial throughput. Gain and power are uncalibrated. Extended tuning does not guarantee PLL lock or reception; the viewer uses the ISM-band warning described above. See [receive-control details](docs/rx-controls.md). ## Contributors <table> <tr> <td align="center"> <a href="https://github.com/Jeija">